Bibliography

@book{tanenbaum2014ModenOS,
  author          = {Tanenbaum, Andrew S. and Bos, Herbert},
  title           = {Modern Operating Systems},
  year            = 2014,
  isbn            = {013359162X},
  publisher       = {Prentice Hall Press},
  address         = {USA},
  edition         = {4th},
  abstract        = { Modern Operating Systems, Fourth Edition, is intended for
		  introductory courses in Operating Systems in Computer Science,
		  Computer Engineering, and Electrical Engineering programs. It
		  also serves as a useful reference for OS professionals The
		  widely anticipated revision of this worldwide best-seller
		  incorporates the latest developments in operating systems (OS)
		  technologies. The Fourth Edition includes up-to-date materials
		  on relevantOS. Tanenbaum also provides information on current
		  research based on his experience as an operating systems
		  researcher. Modern Operating Systems, Third Editionwas the
		  recipient of the 2010 McGuffey Longevity Award. The McGuffey
		  Longevity Award recognizes textbooks whose excellence has been
		  demonstrated over time.http://taaonline.net/index.html
		  Teaching and Learning Experience This program will provide a
		  better teaching and learning experiencefor you and your
		  students. It will help: Provide Practical Detail on the Big
		  Picture Concepts: A clear and entertaining writing style
		  outlines the concepts every OS designer needs to master. Keep
		  Your Course Current: This edition includes information on the
		  latest OS technologies and developments Enhance Learning with
		  Student and Instructor Resources: Students will gain hands-on
		  experience using the simulation exercises and lab experiments.
		  }
}

@book{stallings2018OperatingSysInternalAndDesign,
  author          = {Stallings, William},
  title           = {Operating Systems: Internals and Design Principles, 9/e},
  year            = 2018,
  isbn            = 9352866711,
  publisher       = {Pearson IT Certification},
  address         = {Indianapolis, Indiana, USA},
  edition         = {9th},
  abstract        = {Please Read Notes: Brand New, International Softcover
		  Edition, Printed in black and white pages, minor self wear on
		  the cover or pages, Sale restriction may be printed on the
		  book, but Book name, contents, and author are exactly same as
		  Hardcover Edition. Fast delivery through DHL/FedEx express.}
}

@book{tanenbaum2005OperatingSysImplementation,
  author          = {Tanenbaum, Andrew S and Woodhull, Albert S},
  title           = {Operating Systems Design and Implementation (3rd Edition)},
  year            = 2005,
  isbn            = 0131429388,
  publisher       = {Prentice-Hall, Inc.},
  address         = {USA}
}

@article{Hahm2015OSForLowEndDevice,
  author          = {O. {Hahm} and E. {Baccelli} and H. {Petersen} and N.
		  {Tsiftes}},
  journal         = {IEEE Internet of Things Journal},
  title           = {Operating Systems for Low-End Devices in the Internet of
		  Things: A Survey},
  year            = 2016,
  volume          = 3,
  number          = 5,
  pages           = {720-734},
  abstract        = {The Internet of Things (IoT) is projected to soon
		  interconnect tens of billions of new devices, in large part
		  also connected to the Internet. IoT devices include both
		  high-end devices which can use traditional go-to operating
		  systems (OSs) such as Linux, and low-end devices which cannot,
		  due to stringent resource constraints, e.g., very limited
		  memory, computational power, and power supply. However,
		  large-scale IoT software development, deployment, and
		  maintenance requires an appropriate OS to build upon. In this
		  paper, we thus analyze in detail the specific requirements
		  that an OS should satisfy to run on low-end IoT devices, and
		  we survey applicable OSs, focusing on candidates that could
		  become an equivalent of Linux for such devices, i.e., a
		  one-size-fits-most, open source OS for low-end IoT devices.},
  keywords        = {Internet of Things;mobile computing;operating systems
		  (computers);software maintenance;software maintenance;software
		  deployment;software development;IoT;Internet of Things;low-end
		  device;OS;operating system;Random access
		  memory;Hardware;Internet of things;Operating
		  systems;Standards;Embedded software;Internet of Things
		  (IoT);low-power electronics;operating system (OS)},
  doi             = {10.1109/JIOT.2015.2505901},
  ISSN            = {2327-4662},
  month           = {Oct},
}

@book{tanenbaum2005structuredorg,
  author          = {Tanenbaum, Andrew S.},
  title           = {Structured Computer Organization (5th Edition)},
  year            = 2005,
  isbn            = 0131485210,
  publisher       = {Prentice-Hall, Inc.},
  address         = {USA}
}

@book{patterson2013ComputerOrg,
  author          = {Patterson, David A. and Hennessy, John L.},
  title           = {Computer Organization and Design, Fifth Edition: The
		  Hardware/Software Interface},
  year            = 2013,
  isbn            = 0124077269,
  publisher       = {Morgan Kaufmann Publishers Inc.},
  address         = {San Francisco, CA, USA},
  edition         = {5th},
  abstract        = {The 5th edition of Computer Organization and Design moves
		  forward into the post-PC era with new examples, exercises, and
		  material highlighting the emergence of mobile computing and
		  the cloud. This generational change is emphasized and explored
		  with updated content featuring tablet computers, cloud
		  infrastructure, and the ARM (mobile computing devices) and x86
		  (cloud computing) architectures. Because an understanding of
		  modern hardware is essential to achieving good performance and
		  energy efficiency, this edition adds a new concrete example,
		  "Going Faster," used throughout the text to demonstrate
		  extremely effective optimization techniques. Also new to this
		  edition is discussion of the "Eight Great Ideas" of computer
		  architecture. As with previous editions, a MIPS processor is
		  the core used to present the fundamentals of hardware
		  technologies, assembly language, computer arithmetic,
		  pipelining, memory hierarchies and I/O. Instructors looking
		  for4th Edition teaching materials should e-mail
		  textbook@elsevier.com. Includes new examples, exercises, and
		  material highlighting the emergence of mobile computing and
		  the Cloud. Covers parallelism in depth with examples and
		  content highlighting parallel hardware and software topics
		  Features the Intel Core i7, ARM Cortex-A8 and NVIDIA Fermi GPU
		  as real-world examples throughout the book Adds a new concrete
		  example, "Going Faster," to demonstrate how understanding
		  hardware can inspire software optimizations that improve
		  performance by 200 times. Discusses and highlights the "Eight
		  Great Ideas" of computer architecture: Performance via
		  Parallelism; Performance via Pipelining; Performance via
		  Prediction; Design for Moore's Law; Hierarchy of Memories;
		  Abstraction to Simplify Design; Make the Common Case Fast; and
		  Dependability via Redundancy. Includes a full set of updated
		  and improved exercises.}
}

@book{stallings2009ComputerOrgPerf,
  author          = {Stallings, William},
  title           = {Computer Organization and Architecture: Designing for
		  Performance},
  year            = 2009,
  isbn            = 9780136073734,
  publisher       = {Prentice Hall Press},
  address         = {USA},
  edition         = {8th},
  abstract        = {KEY BENEFIT: Learn the fundamentals of processor and
		  computer design from the newest edition of this award winning
		  text. KEY TOPICS: Introduction; Computer Evolution and
		  Performance; A Top-Level View of Computer Function and
		  Interconnection; Cache Memory; Internal Memory Technology;
		  External Memory; I/O; Operating System Support; Computer
		  Arithmetic; Instruction Sets: Characteristics and Functions;
		  Instruction Sets: Addressing Modes and Formats; CPU Structure
		  and Function; RISCs; Instruction-Level Parallelism and
		  Superscalar Processors; Control Unit Operation;
		  Microprogrammed Control; Parallel Processing; Multicore
		  Architecture. Online Chapters: Number Systems; Digital Logic;
		  Assembly Language, Assemblers, and Compilers; The IA-64
		  Architecture. MARKET: Ideal for professionals in computer
		  science, computer engineering, and electrical engineering.}
}

@techreport{riscv2019PrivilegeArchitecture,
    Author = {Waterman, Andrew and Lee, Yunsup and Avizienis, Rimas and Patterson, David A. and Asanović, Krste},
    Title = {The RISC-V Instruction Set Manual Volume II: Privileged Architecture Ratified Version 1.11},
    Institution = {EECS Department, University of California, Berkeley},
    Year = {2019},
    Month = {Jun},
    URL = {https://github.com/riscv/riscv-isa-manual/releases/download/Ratified-IMFDQC-and-Priv-v1.11/riscv-privileged-20190608.pdf},
    Number = {v.20190608}
}

@inproceedings{ottavi2019TheCaseForRiscvInSpace,
  author          = "Di Mascio, Stefano and Menicucci, Alessandra and Furano,
		  Gianluca and Monteleone, Claudio and Ottavi, Marco",
  editor          = "Saponara, Sergio and De Gloria, Alessandro",
  title           = "The Case for RISC-V in Space",
  booktitle       = "Applications in Electronics Pervading Industry, Environment
		  and Society",
  year            = 2019,
  publisher       = "Springer International Publishing",
  address         = "Cham",
  pages           = "319--325",
  abstract        = "This paper presentsDi Mascio, Stefano preliminary position
		  on theMenicucci, Alessandra use of the novel, free and open
		  RISC-V Instruction Set Architecture (ISA) for on-boardFurano,
		  Gianluca electronics in space. The modular nature of this ISA,
		  the availability of a rich software ecosystem, a rapidly
		  growing communityMonteleone, Claudio and a pool of open-source
		  IP cores will allow Space Industry to spin-in developments
		  from terrestrial fields (in terms of security, artificial
		  intelligence, support forOttavi, Marco operating systems,
		  hardware acceleration etc.) while focusing its efforts mainly
		  on aspects related to the specific needs of on-board
		  electronics for space applications (e.g. fault tolerance,
		  observability, error signaling, etc.). This will improve reuse
		  and avoid the necessity of developments from scratch when not
		  strategically needed, eventually increasing productivity and
		  reducing costs. The use of an open, non proprietary ISA will
		  allow ad-hoc design of microarchitecture-level soft error
		  countermeasures that can greatly increase the robustness of
		  Application Specific Standard Products (ASSP) and FPGA
		  implementations.",
  isbn            = "978-3-030-11973-7"
}

@book{patterson2017RiscvAtlas,
  author          = {Patterson, David and Waterman, Andrew},
  title           = {The RISC-V Reader: An Open Architecture Atlas},
  year            = 2017,
  isbn            = 0999249118,
  publisher       = {Strawberry Canyon},
  edition         = {1st},
  abstract        = {The RISC-V Reader is a concise introduction and reference
		  for embedded systems programmers, students, and the curious to
		  a modern, popular, open architecture. RISC-V spans from the
		  cheapest 32-bit embedded microcontroller to the fastest 64-bit
		  cloud computer. The text shows how RISC-V followed the good
		  ideas of past architectures while avoiding their mistake.
		  Highlights include: Introduces the RISC-V instruction set in
		  only 100 pages, including 75 figures An Instruction Translator
		  Guide to help translate assembly language programs from ARM-32
		  and x86-32 instruction sets to RISC-V 2-page RISC-V Reference
		  Card that summarizes all instructions 50-page Instruction
		  Glossary that defines every instruction in detail 75
		  spotlights of good architecture design using margin icons 50
		  sidebars with interesting commentary and RISC-V history 25
		  quotes to pass along wisdom of noted scientists and engineers
		  Ten chapters introduce each component of the modular RISC-V
		  instruction set--often contrasting code compiled from C to
		  RISC-V versus the older ARM, Intel, and MIPS
		  architectures--but readers can start programming after Chapter
		  2. Praise for The RISC-V Reader: This timely book concisely
		  describes the simple, free and open RISC-V ISA that is
		  experiencing rapid uptake in many different computing sectors.
		  Krste Asanovic, University of California, Berkeley, one of the
		  four architects of RISC-V I like RISC-V and this book as they
		  are elegantbrief, to the point, and complete. C. Gordon Bell,
		  a computer architecture pioneer This handy little book
		  effortlessly summarizes all the essential elements of the
		  RISC-V Instruction Set Architecture, a perfect reference guide
		  for students and practitioners alike. Professor Randy Katz,
		  University of California, Berkeley, one of the inventors of
		  RAID storage systems This clearly-written book offers a good
		  introduction to RISC-V, augmented with insightful comments on
		  its evolutionary history and comparisons with other familiar
		  architectures. John Mashey, one of the designers of the MIPS
		  architecture This book tells what RISC-V can do and why its
		  designers chose to endow it with those abilities. Ivan
		  Sutherland, the father of computer graphics RISC-V will change
		  the world, and this book will help you become part of that
		  change. Professor Michael B. Taylor, University of Washington
		  This book will be an invaluable reference for anyone working
		  with the RISC-V ISA. Megan Wachs, PhD, SiFive Engineer}
}

@misc{Waterman14therisc-v,
  author          = {Andrew Waterman and Yunsup Lee and David A. Patterson and
		  Krste Asanovic and Volume I User-level Isa and Andrew Waterman
		  and Yunsup Lee and David Patterson},
  title           = {The RISC-V Instruction Set Manual},
  year            = 2014
}

@book{patterson2017ComputerOrgRiscvEdition,
  author          = {Patterson, David A. and Hennessy, John L.},
  title           = {Computer Organization and Design RISC-V Edition: The
		  Hardware Software Interface},
  year            = 2017,
  isbn            = 0128122757,
  publisher       = {Morgan Kaufmann Publishers Inc.},
  address         = {San Francisco, CA, USA},
  edition         = {1st},
  abstract        = {The new RISC-V Edition of Computer Organization and Design
		  features the RISC-V open source instruction set architecture,
		  the first open source architecture designed to be used in
		  modern computing environments such as cloud computing, mobile
		  devices, and other embedded systems. With the post-PC era now
		  upon us, Computer Organization and Design moves forward to
		  explore this generational change with examples, exercises, and
		  material highlighting the emergence of mobile computing and
		  the Cloud. Updated content featuring tablet computers, Cloud
		  infrastructure, and the x86 (cloud computing) and ARM (mobile
		  computing devices) architectures is included. An online
		  companion Web site provides advanced content for further
		  study, appendices, glossary, references, and recommended
		  reading. Features RISC-V, the first such architecture designed
		  to be used in modern computing environments, such as cloud
		  computing, mobile devices, and other embedded systems Includes
		  relevant examples, exercises, and material highlighting the
		  emergence of mobile computing and the cloud}
}

@inproceedings{wang2009modeling,
  author          = { {Guoping Wang}},
  booktitle       = {2009 International Conference on Mechatronics and
		  Automation},
  title           = {Modeling C-based embedded system using UML design},
  year            = 2009,
  pages           = {2973-2977},
  abstract        = {Unified Modeling Language (UML) 2.0 is emerging in the area
		  of modeling the design of embedded system. The most common
		  implementation for the embedded-system models has been C++. On
		  one hand, the most common programming language for embedded
		  system overall by far is the functional language C. On the
		  other hand, the UML is used almost exclusively for
		  object-oriented systems development. This paper present an
		  approach of applying UML in the functionally-oriented embedded
		  systems design. This approach is illustrated using a stopwatch
		  design example.},
  keywords        = {C++ language;embedded systems;functional languages;Unified
		  Modeling Language;modeling C-based embedded system;UML
		  design;Unified Modeling Language;UML 2.0;C++;programming
		  language;functional language C;object-oriented systems
		  development;functionally-oriented embedded systems
		  design;stopwatch design;Embedded system;Unified modeling
		  language;Object oriented modeling;Computer languages;Embedded
		  computing;Real time systems;Costs;Energy
		  consumption;Mechatronics;Design automation;UML
		  modeling;embedded system
		  design;object-oriented;function-oriented},
  doi             = {10.1109/ICMA.2009.5246023},
  ISSN            = {2152-744X},
  month           = {Aug},
}

@article{avizienis2004ConceptsOfSecureComputing,
  author          = {A. {Avizienis} and J. -. {Laprie} and B. {Randell} and C.
		  {Landwehr}},
  journal         = {IEEE Transactions on Dependable and Secure Computing},
  title           = {Basic concepts and taxonomy of dependable and secure
		  computing},
  year            = 2004,
  volume          = 1,
  number          = 1,
  pages           = {11-33},
  abstract        = {This paper gives the main definitions relating to
		  dependability, a generic concept including a special case of
		  such attributes as reliability, availability, safety,
		  integrity, maintainability, etc. Security brings in concerns
		  for confidentiality, in addition to availability and
		  integrity. Basic definitions are given first. They are then
		  commented upon, and supplemented by additional definitions,
		  which address the threats to dependability and security
		  (faults, errors, failures), their attributes, and the means
		  for their achievement (fault prevention, fault tolerance,
		  fault removal, fault forecasting). The aim is to explicate a
		  set of general concepts, of relevance across a wide range of
		  situations and, therefore, helping communication and
		  cooperation among a number of scientific and technical
		  communities, including ones that are concentrating on
		  particular types of system, of system failures, or of causes
		  of system failures.},
  keywords        = {fault tolerant computing;data privacy;security of
		  data;system recovery;software reliability;taxonomy;dependable
		  computing;secure computing;system reliability;system
		  availability;system safety;system integrity;system
		  maintainability;fault prevention;fault tolerance;fault
		  removal;fault forecasting;system security;system
		  failures;system vulnerabilities;system
		  attacks;Taxonomy;Availability;Fault
		  tolerance;Safety;Maintenance;Communication system
		  security;Uncertainty;Standardization;Books;Index Terms-
		  Dependability;security;trust;faults;errors;failures;vulnerabilities;attacks;fault
		  tolerance;fault removal;fault forecasting.},
  doi             = {10.1109/TDSC.2004.2},
  ISSN            = {1941-0018},
  month           = {Jan},
}

@misc{sean2005BitTwiddlingHacks,
  title           = { Bit Twiddling Hacks },
  url             = {https://graphics.stanford.edu/~seander/bithacks.html},
  journal         = {Bit Twiddling Hacks},
  author          = {Sean Eron Anderson}
}

@misc{binaryNumberRepresentation,
  title           = {Unsigned Binary Integer},
  url             =
		  {https://www.mathcs.emory.edu/~cheung/Courses/255/others/BinNumReps.html},
  journal         = {Binary Number Representations}
}

@misc{derekpark2008WhatAreBitwiseShift,
  title           = {What are bitwise shift (bit-shift) operators and how do
		  they work?},
  url             = {https://stackoverflow.com/a/141873},
  journal         = {What are bitwise shift (bit-shift) operators and how do
		  they work},
  publisher       = {Stackoverflow},
  author          = {Derek Park},
  year            = 2008,
  month           = {Sep}
}